The X7000 series Motion Control LSI chip are designed specifically for pulse signal motor control applications. Motion control LSI is increasingly seen as superior to conventional motor control systems such as one chip microcomputers and Field-Programmable Gate Array (FPGA), in terms of reduced development workload and lead times for precision control applications.
The Motion Control LSI is already loaded with the complex adjustable speed programming elements used in motor control, enabling fast-track development of ideal S-shaped speed control with optimized inertia moment.
Faster control programming means shorter overall development lead time and significant savings at the development stage. The Motion Control LSI is a revolutionary device that boosts product value and delivers a genuine market advantage.
■Slashes development lead times
■Your product can be released faster than designed in FPGA/one chip microcomputer
■Recoup initial investment in development more quickly and start generating profits sooner
■Lower development costs means less risk overall
|
CPU one chip microcomputer | FPGA | Motion Control LSI | ||||||
---|---|---|---|---|---|---|---|---|---|
(Poor) |
(Good) |
(Excellent) |
(Poor) |
(Good) |
(Excellent) |
(Poor) |
(Good) |
(Excellent) |
|
Development time | ● | ● | ● | ||||||
Flexibility of additional functions | ● | ● | ● | ||||||
Ease of programming | ● | ● | ● | ||||||
Pulse output in high-frequency domain | ● | ● | ● | ||||||
CPU load | ● | ● | ● | ||||||
High speed actions | ● | ● | ● | ||||||
Complex actions | ● | ● | ● | ||||||
Product price | ● | ● | ● | ||||||
Processing rate | ● | ● | ● | ||||||
Total cost (multiproduct, small-lot scenario) | ● | ● | ● | ||||||
Total cost (mass production scenario) | ● | ● | ● |
Motion Control LSI
X7083A
Motion Control LSI
X7043A
Motion Control LSI
X7023A
Key specifications
Reference clock | 20 MHz (recommended 16.384 or 19.6608 MHz) | ||
---|---|---|---|
Maximum speed | 5MHz | ||
Travel | 24-bit (1 – 16,777,216 pulses) | ||
Speeds | x 250 | ||
x 25 | 250 - 4,095,750pps | ||
x 5 | 25 - 409,575pps | ||
x 1 | 5 - 81,915pps | ||
x 0.1 | 1 - 16,383pps | ||
Speed adjustment (linear) | x 250 | 31.25 - 511,968pps/msec | |
x 25 | 31.25 - 511,968pps/msec | ||
x 5 | 0.625 - 10.23936pps/msec | ||
x 1 | 0.125 - 2.07872pps/msec | ||
x 0.1 | 0.0125 - 0.207872pps/msec | ||
Acceleration/deceleration time (full range) | Linear | 8msec - 131sec | |
Radial | 16msec - 262sec | ||
SIN | 12.56msec - 205.77sec |
Drive commands
Positioning drive | Incremental (index) drive |
---|---|
Origin search (origin return I, II, III, IV and V) | |
Sensor positioning | |
Interpolation drive | Linear interpolation drive |
None | |
Other | Continuous drive |
None |
Drive mode
Deceleration starting point | Auto calculated, manually set, offset setting |
---|---|
Acceleration/deceleration shape | S-shaped, linear, separately set by acceleration/deceleration |
Synchronization | Synchronizable between start, stop, accelerate and decelerate chips |
Counters
Speed counterSpeed counter | 14 - bit |
---|---|
Remaining pulse counter | 24 - bit |
Deviation counter | 24 - and 32 - bit (via setting) |
Command position counter | 24 - and 32 - bit (via setting) |
Actual position counter | 24 - and 32 - bit (via setting) |
Circular XY command position counter | None |
encoder input | 2 - clock, 1 - multiplier, 2 - multiplier, 4 - multiplier |
Synchronization latch |
None |
Comparators
Command position comparator | 24-bit (via setting) |
---|---|
Actual position comparator | |
Multi-purpose comparator |
Technology
Gate structure | CMOS |
|
---|---|---|
Input power voltage | X7083A | VddlNT 3.0 - 3.6V |
X7043A X7023A |
VddlO 4.5 – 5.5 V and 3.0 – 3.6 V | |
5 V input tolerant | None |
Packages
8-axis | X7083A QFP208pin (30.0 x 30.0) |
---|---|
4-axis | X7043A QFP144pin (22.0 x 22.0) |
2-axis | X7023A QFP100pin (16.0 x 16.0) |
1-axis | None |